1.4 Classifying Parallel Architectures: Flynn's Taxonomy

Flynn’s Taxonomy is a classification system for computer architectures proposed by Michael J. Flynn in 1966 ¹. This taxonomy categorizes architectures based on two properties: the number of concurrent instruction streams and the number of concurrent data streams ². An instruction stream is the sequence of instructions executed by the machine; a data stream is the sequence of data being processed. This classification produces four categories ².

Flynn’s Taxonomy classification matrix showing the four categories based on instruction and data stream multiplicity. Image Credit: ResearchGate

The Four Categories

1. SISD (Single Instruction, Single Data)

A uniprocessor sequential computer with a single control unit that fetches and executes one instruction stream operating on one data stream ². This represents the von Neumann architecture. Only one instruction is processed at a time ².

Examples: Early personal computers (Intel 386, 486 processors), older mainframe computers, simple embedded microcontrollers like Arduino Uno ¹.

2. SIMD (Single Instruction, Multiple Data)

A single control unit dispatches one instruction to multiple processing elements. Each processing element executes the same instruction on its own data ². This architecture supports data-level parallelism, where the same operation is performed on arrays or vectors of data ².

Examples: Graphics Processing Units (GPUs) use this architecture, executing shader programs on thousands of pixels or vertices simultaneously ¹. Other examples include vector supercomputers (Cray-1) and CPU instruction set extensions like Intel’s SSE and AVX, and ARM’s NEON, which allow a CPU core to perform operations on vectors of data elements ¹.

3. MISD (Multiple Instruction, Single Data)

Multiple instruction streams operate concurrently on a single data stream ³. This is the rarest category in practice. It is used in fault-tolerant systems where multiple processing units perform different calculations on the same input data, and their results are cross-checked to detect and correct errors ².

Example: The Space Shuttle’s flight control computer system used multiple redundant computers that processed the same sensor data stream. Their outputs were compared to ensure correctness and guard against hardware failures or radiation-induced errors ⁴.

4. MIMD (Multiple Instruction, Multiple Data)

Multiple autonomous processors each fetch and execute their own instruction stream on their own data stream ². This supports both task parallelism (different processors performing different tasks) and data parallelism. MIMD systems are subdivided into shared-memory and distributed-memory variants ².

Examples: Most modern parallel systems use this architecture, including multi-core processors (Intel Core i7, AMD Ryzen), symmetric multiprocessing servers, supercomputer clusters, and distributed computing platforms (Amazon EC2, Google Cloud, SETI@home) ¹.

Flynn’s Taxonomy at a Glance

Architecture	Description	Instruction Stream	Data Stream	Key Characteristics	Real-World Examples
SISD	Single Instruction, Single Data	Single	Single	Sequential execution; uniprocessor.	Early PCs (Intel 386), simple microcontrollers.
SIMD	Single Instruction, Multiple Data	Single	Multiple	Data-level parallelism; used for vector/matrix operations.	GPUs (NVIDIA, AMD), CPU extensions (AVX, NEON).
MISD	Multiple Instruction, Single Data	Multiple	Single	Rare; used for fault tolerance via redundancy.	Space Shuttle flight control computers.
MIMD	Multiple Instruction, Multiple Data	Multiple	Multiple	Supports task and data parallelism.	Multi-core CPUs, supercomputer clusters, cloud infrastructure.

Modern Systems as Heterogeneous Hybrids

Modern high-performance systems typically combine multiple architecture types rather than implementing a single pure category. These heterogeneous computing systems incorporate multiple parallel models ¹.

A modern supercomputer illustrates this hierarchy: at the top level, it is a MIMD system with thousands of interconnected nodes. Each node is also a MIMD system with a multi-core CPU where each core executes an independent thread. Within each CPU core are SIMD units (AVX vector engines) that perform data-parallel operations. Many nodes include GPU accelerators, which are SIMD engines.

Thus, a system can use MIMD parallelism at the cluster and multi-core level for task coordination and control flow, while using SIMD parallelism at the core and GPU level for data-parallel computations. Flynn’s Taxonomy applies not only to classifying entire machines but also to understanding the different parallel execution models that coexist within a single system ¹.

References

Footnotes

1. Flynn’s Taxonomy and Classification of Parallel Systems | Parallel and Distributed Computing Class Notes | Fiveable, accessed September 30, 2025, https://fiveable.me/parallel-and-distributed-computing/unit-2/flynns-taxonomy-classification-parallel-systems/study-guide/Ohzf44x4HCtFZRjK ↩ ↩² ↩³ ↩⁴ ↩⁵ ↩⁶ ↩⁷

2. Flynn’s Taxonomy - GeeksforGeeks, accessed September 30, 2025, https://www.geeksforgeeks.org/computer-organization-architecture/computer-architecture-flynns-taxonomy/ ↩ ↩² ↩³ ↩⁴ ↩⁵ ↩⁶ ↩⁷ ↩⁸ ↩⁹

3. Flynn’s Taxonomy - SLING user documentation, accessed September 30, 2025, https://doc.sling.si/en/hpc-guide/02-computer-architecture/01-flynns-taxonomy/01-flynns-taxonomy/ ↩

4. unit 2 classification of parallel computers - | HPC @ LLNL, accessed September 30, 2025, https://hpc.llnl.gov/sites/default/files/parallelClassifications_0.pdf ↩